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Principal Silicon Verification Engineer – Bengaluru
<p><strong><span data-contrast="none">About us</span></strong><span data-ccp-props="{}"> </span></p>
<p><span data-contrast="none">Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. </span> <span data-contrast="none"> </span><span data-ccp-props="{}"> </span></p>
<p><span data-contrast="none">As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies.</span><span data-ccp-props="{}"> </span></p>
<p><strong><span data-contrast="none">Job Summary </span></strong> <br><span data-contrast="auto">Working within the Silicon verification team, the silicon verification engineer is responsible for a wide range of tasks within the silicon verification team. This person is responsible for verification activities within Graphcore, helping the silicon team meet the company objectives for quality silicon delivery. </span><span data-ccp-props="{}"> </span></p>
<p><strong><span data-contrast="auto">The Team</span></strong><span data-ccp-props="{}"> </span></p>
<p><span data-contrast="auto">The verification team sits within the Silicon design team. We are responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. </span><span data-ccp-props="{"201341983":1,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto">Responsibilities and Duties</span></strong> <br><span data-ccp-props="{}"> </span></p>
<ul>
<li><span data-contrast="none"><span data-ccp-parastyle="paragraph" data-ccp-parastyle-defn="{"ObjectId":"aaed607e-c2a3-5841-9fb4-41037bfa0faf|1","ClassId":1073872969,"Properties":[201342446,"1",201342447,"5",201342448,"1",201342449,"1",469777841,"Times New Roman",469777842,"Times New Roman",469777843,"Times New Roman",469777844,"Times New Roman",201341986,"1",469769226,"Times New Roman",268442635,"24",469775450,"paragraph",201340122,"2",134233614,"true",469778129,"paragraph",335572020,"1",335559705,"2057",134233118,"true",134233117,"true",469778324,"Normal"]}">V</span><span data-ccp-parastyle="paragraph">erification activit</span><span data-ccp-parastyle="paragraph">i</span><span data-ccp-parastyle="paragraph">es within the verification team</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":259}"> </span></li>
<li><span data-contrast="none">Ensuring good communication between sites</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Verification planning, specification and closure of functional coverage</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Providing feedback to architects</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Test generation and failure diagnosis/triage</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Contributing to shared verification infrastructure</span><span data-ccp-props="{}"> </span></li>
</ul>
<p><strong><span data-contrast="none">Candidate Profile </span></strong></p>
<p><strong><span data-contrast="auto">Essential:</span></strong> <br><span data-ccp-props="{}"> </span></p>
<ul>
<li><span data-contrast="none"><span data-ccp-parastyle="paragraph">verification experience in relevant industry</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none">Proven leadership and planning skills</span><span data-ccp-props="{"201341983":0,"335559740":259}"> </span></li>
<li><span data-contrast="none">Be highly motivated, a self starter, and a team player</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Ability to work across teams and programming languages to find root causes of deep and complex issues</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none"><span data-ccp-charstyle="eop" data-ccp-charstyle-defn="{"ObjectId":"920dbcde-2834-5e15-a5fa-062170b236ba|1","ClassId":1073872969,"Properties":[201342446,"1",201342447,"5",201342448,"1",201342449,"1",469777841,"Calibri",469777842,"Arial",469777843,"Calibri",469777844,"Calibri",201341986,"1",469769226,"Calibri,Arial",268442635,"24",469775450,"eop",201340122,"1",134233614,"true",469778129,"eop",335572020,"1",469778324,"Default Paragraph Font"]}">Ability to research along with the knowledge to solve complex problems</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none"><span data-ccp-charstyle="eop">Presents technical and functional knowledge to design experiments/ projects that contribute to overall direction of team</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none"><span data-ccp-charstyle="eop">Exercises independent judgment in developing methods, </span><span data-ccp-charstyle="eop">techniques</span><span data-ccp-charstyle="eop"> and evaluation criteria for obtaining results</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none"><span data-ccp-charstyle="eop">Highly influential on colleagues with ability to explain difficult concepts</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none">Experience of the verification process applied in CPU and/or ASIC environments</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">System Verilog, Python, C++, Linux<span data-ccp-charstyle="normaltextrun" data-ccp-charstyle-defn="{"ObjectId":"ac0262f4-8a9e-5820-b908-2d943c5f7113|1","ClassId":1073872969,"Properties":[201342446,"1",201342447,"5",201342448,"1",201342449,"1",469777841,"Calibri",469777842,"Arial",469777843,"Calibri",469777844,"Calibri",201341986,"1",469769226,"Calibri,Arial",268442635,"24",469775450,"normaltextrun",201340122,"1",134233614,"true",469778129,"normaltextrun",335572020,"1",469778324,"Default Paragraph Font"]}"> </span></span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none"><span data-ccp-charstyle="eop">12 – 14 years-experience in engineering background</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
</ul>
<p><strong><span data-contrast="auto">Desirable</span></strong><span data-ccp-props="{}"> </span></p>
<ul>
<li><span data-contrast="none"><span data-ccp-parastyle="paragraph">UVM</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":0,"335559739":0}"> </span></li>
<li><span data-contrast="none">SVA</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Assembly languages</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">LLVM, GCC</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">DVCS e.g. Git</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">SGE or other DRMS</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">XML and XPath/XSLT</span><span data-ccp-props="{}"> </span></li>
<li><span data-contrast="none">Web programming – HTML/DOM, Javascript, SQL </span><span data-ccp-props="{}"> </span></li>
</ul>